1. Field of the Invention
The present invention relates to a method for storing bytes in multi-level nonvolatile memory cells and particularly in Flash memory cells.
2. Discussion of the Related Art
The need to have non-volatile memory devices with a higher and higher memory capacity requires semiconductor makers to continuously reduce the dimensions of the memory devices and to increase the density of stored data.
A typical method utilized for increasing the density of the data stored in a Flash memory, without necessarily reducing the dimensions of the single memory cells, consists in programming and reading the same cells by a multi-level technology. Such technology consists in storing more than one bit in each single cell, this is the cell must show m=2.sup.n different programming states or analog levels, wherein n represents the number of bits which can be stored in the memory cells, and each level is in correspondence with a different value of the threshold voltage of the transistor constituting the cell.
With respect to binary Flash memory cells, for discriminating the m different programming levels a higher precision in programming and reading is required, thus making these operations slower. However, because the increasing interest in the formation of the mass memory devices, which replace the magnetic disk with the Flash memories, has brought definition of some standards (for example MultiMediaCard, SmartMedia, MemoryStick, CompactFlash) which interface the host system with the same memory by relative speed specifications, it is necessary to speed all the basic operations in the Flash memory cells: writing, reading and programming.
In order to speed the writing and reading operations a fast sense amplifier is utilized which allows reducing the time in the check step. This last step consists in controlling continuously the achieved threshold voltage value, as ensuring that it is the value desired after having applied a certain pulse number to the same cell.
A recent technology provides to use a successive approximation sense amplifier to allow also the parallel reading of many multi-level memory cells. The threshold value is converted into a current, and by n comparison steps, where n is the bit number for a memory cell, the digital information is available at output. In reality, already after the first comparison the first of the bit n stored in the cell is available at output, and generally in the i-eth step the i-eth bit is available.
If a byte is stored into two multi-level Flash memory cells, for example in sixteen levels, different steps for writing the byte are necessary. In fact initially the first four bits of the byte must be assembled and transformed in the correspondent analog level and written in a multi-level Flash memory cell. Then it is necessary to assemble the second four bits of the byte, to transform them into the correspondent level and to write the level in another multi-level Flash cell. In order to read the byte, even by reading the two cells in parallel, at least four comparison cycles are necessary in order to have available the whole byte and this increases considerably the reading time.
In view of the state of the art described, it is an object of the present invention to provide a method to carry out, in a faster way, the storing of bytes in multi-level nonvolatile memory cells.